Skip to content

Watchdog

Pigeon computer has two watchdogs. The first watchdog is integrated into the SoC, and the second is the STWD100 chip connected to the GPIOs.

Broadcom SoC watchdog

The Broadcom SoC has a built-in hardware watchdog timer. By default, the Broadcom SoC watchdog is enabled. To check the watchdog status, use the following command:

$ dmesg | grep watchdog

To check the watchdog service, use:

$ systemctl status watchdog.service

If you need to change the configuration of the watchdog, edit the /etc/watchdog.conf file.

Watchdog chip

The Pigeon computer has the STWD100 watchdog chip controlled by GPIO, as described in the table below.

Table 1. Watchdog GPIO

FUNCTION GPIO
Enable watchdog - EN GPIO5
Watchdog input - WDI GPIO44

The enable signal is active low. By default, the enable signal is set high (GPIO5 = 1), so the watchdog is not active.

If the EN signal is active, then the Watchdog input (WDI) must be toggled within the watchdog timeout period (1 second); otherwise, the reset signal is asserted. The watchdog timer is cleared by:

  • by toggling the WDI input from high to low,
  • by a pulse on the enable pin EN,
  • by a transition on the watchdog output (reset).

Pulses on the WDI input with a duration of at least 1 µs are detected.